| Frequency | 10 MHz to 225 MHz (LVCMOS) 1500 MHz (LVPECL) 1500 MHz (LVDS) |
| Current | |
| LVCMOS | 25 mA max. |
| LVPECL | 60 mA Max. |
| LVDS | 35 mA Max. |
| Duty Cycle | LVCMOS 50% ±5% @50% VDD LVPECL 50% ±5% @ 50%* LVDS 50% ±5% @ 50%* |
| Frequency Stability | See Table Below |
| Operating Temperature | See Table Below |
| Output Level | |
| LVCMOS | VOH=90% VDD min., VOL=10% VDD max. |
| LVPECL | VOH=VDD-1.03V max. (Nom Load)., VOL=VDD-1.6 max. (Nom Load) |
| LVDS | VOD=(Diff. Output) 350 mV |
| Output Load | |
| LVCMOS | 15pF |
| LVPECL | 50Ω to VDD - 2.0 VDC |
| LVDS | RL = 100 Ω / CL = 10 pF |
| Phase Jitter (RMS) At 12KHz to 20MHz | 0.9 ps typical |
| Rise / Fall Time | LVCMOS 3.0 ns max.(90%/10%)* LVPECL 0.6 ns max. (80%/20%)* LVDS 0.6 ns max. (80%/20%)* |
| Storage Temperature | -40°C to +100°C |
| Supply Voltage | 3.3 VDC ±10%, 2.5 VDC ±5% |
| Package | Input Voltage | Operating Temperature | Stability (in ppm) | Output | Enable / Disable | Complimentary Output (Pin 5) ** | Frequency |
|---|---|---|---|---|---|---|---|
| ISM63 | 3 = 3.3V | 1 = 0°C to + 70°C | F = ±20 | 3 = LVCMOS | H = Enable (Pin 1) | 1 = N.C. | 155.520 MHz |
| 6 = 2.5V | 3 = -20°C to +70°C | A = ±25 | 8 = LVDS | K = Enable (Pin 2) | 2 = Output | ||
| 2 = -40°C to +85°C | B = ±50 | 9 = LVPECL |